Staff Digital Verification Engineer

Company: onsemi

Role summary

Staff Digital Verification Engineer is a full-time role at onsemi in Bengaluru, Karnataka, India (on-site). Posted 2026-10-13. Experience level: 5-10.

Job title
Staff Digital Verification Engineer
Company
onsemi
Location
Bengaluru, Karnataka, India
Work arrangement
on-site
Employment type
full-time
Category
Software Engineering
Experience level
5-10
Date posted
2026-10-13

This is a fantastic opportunity for an experienced Digital Verification Engineer to join a leading semiconductor company. You'll get to work on complex ASIC/SoC projects, tackling challenging verification tasks and contributing to cutting-edge technology development. The role offers a great chance to grow your expertise in a dynamic environment.

Job description

Position Summary

We are looking for a highly motivated Staff Digital Verification Engineer with 6-10 years of experience in ASIC/SoC verification. The ideal candidate will have strong expertise in System Verilog (SV) and UVM , along with hands-on experience in developing scalable verification environments, coverage-driven verification, and debugging complex RTL and gate-level issues. Exposure to Gate-Level Simulation (GLS) is required, while experience with fault injection simulations will be considered a strong advantage.

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Responsibilities

Key Responsibilities

Expected to take ownership and lead verification efforts across IP, subsystem, and SoC-level projects and work independently.

Independently Architect and develop reusable verification environments using System Verilog and UVM.

Create constrained-random, directed, and scenario-based test cases.

Develop scoreboards, monitors, protocol checkers, assertions (SVA), and coverage models.

Analyze and debug RTL and gate-level simulation failures for timing and functional signoff.

Analyze, debug, and enhance C/C++ golden reference models for functional verification.

Execute, and debug fault injection simulations to validate functional safety requirements and fault handling mechanisms.

Collaborate closely with design, DFT, physical design, and architecture teams to resolve issues and support sign-off activities.

Work with AI-assisted engineering tools (e.g., GitHub Copilot, Microsoft Copilot, LLM-based code generation/debug tools, AI-driven verification productivity solutions) to enhance regression infrastructure and verification automation

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Qualifications

Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.

6-10 years of hands-on experience in Digital/ASIC/SoC Verification.

Strong expertise in: System Verilog (Mandatory) and UVM (Mandatory)

Familiarity with industry-standard simulators such as Xcelium and Questa.

Verification experience with some or all protocols such I2C, AHB/APB, MIPI

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onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

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