NOC Emulation Staff Engineer
Company: Qualcomm
Role summary
NOC Emulation Staff Engineer is a full-time role at Qualcomm in Bengaluru, Karnataka, India (on-site). Posted 2026-10-08. Experience level: 5-10.
- Job title
- NOC Emulation Staff Engineer
- Company
- Qualcomm
- Location
- Bengaluru, Karnataka, India
- Work arrangement
- on-site
- Employment type
- full-time
- Category
- Software Engineering
- Experience level
- 5-10
- Date posted
- 2026-10-08
This role offers a fantastic opportunity to join a leading tech company and work on cutting-edge hardware verification for complex SoCs. You'll get to use industry-leading emulation platforms and play a key part in accelerating the pre-silicon validation process. It's a great chance to grow your skills in a dynamic environment.
Job description
Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
We are seeking a highly motivated Emulation Engineer to join our IP verification team. The candidate will be responsible for developing and executing hardware-assisted verification solutions using industry-leading emulation platforms. The role involves enabling pre-silicon validation of complex SoCs, accelerating verification cycles, debugging complex system-level issues, and collaborating closely with Design, DV, Architecture, Software, and Post-Silicon teams.
The ideal candidate should possess strong expertise in SystemVerilog/UVM, emulation technologies, SoC architectures, and verification methodologies.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Key Responsibilities
Emulation Environment Development
Port simulation-based verification environments to emulation platforms.
Develop synthesizable testbench components, transactors, and BFMs for hardware-assisted verification.
Optimize testbenches and verification flows for emulation performance and scalability.
Enable execution of long-running use cases that are impractical in simulation.
Debug and Analysis
Analyze failures observed in emulation runs and root-cause RTL, testbench, or software issues.
Generate and analyze waveforms, transaction traces, and performance metrics.
Work with design teams to resolve functional and performance-related bugs.
Compare emulation results against simulation and silicon behavior when required.
Infrastructure and Automation
Develop automation scripts for regression execution, result collection, and reporting.
Improve compile and runtime efficiency of emulation environments.
Drive continuous improvements in hardware-assisted verification methodologies.
Cross-Functional Collaboration
Work closely with RTL, Design Verification, Architecture, Firmware, and Post-Silicon teams.
Participate in verification planning, coverage reviews, and signoff discussions.
Mentor junior engineers and contribute to team-wide best practices.
Required Qualifications
Bachelor's or Master's degree in Electronics Engineering, Computer Engineering, Electrical Engineering, or related field.
4 to 10 years of experience in Design Verification and/or Emulation.
Strong understanding of digital design fundamentals and computer architecture.
Expertise in SystemVerilog and UVM.
Experience with hardware-assisted verification platforms such as: Cadence Palladium
Synopsys ZeBu
Siemens Veloce
Experience with: Synthesizable testbench development
Transaction-based acceleration
Hybrid/emulation verification methodologies
Strong debugging skills using: Verdi
DVE
SimVision
Waveform analysis tools
Good scripting knowledge in: Python
Perl
Shell scripting
Preferred Qualifications
Experience with one or more protocols: PCIe
CXL
AXI/AHB/APB
Experience with: SoC-level verification
Firmware validation
Embedded software bring-up
Performance validation
Low-power verification
Post-silicon correlation
Exposure to GPU, AI/ML, Automotive, Mobile, Networking, or Datacenter SoCs.
Technical Skills
Must Have
SystemVerilog
UVM
Emulation Platforms (ZeBu/Palladium/Veloce)
RTL Debug
Functional Coverage
Assertions (SVA)
Linux/Unix Environment
Good to Have
C/C++
SystemC/TLM
Python Automation
Formal Verification
FPGA Prototyping
Firmware/Embedded Software
Desired Soft Skills
Excellent analytical and problem-solving abilities.
Strong verbal and written communication skills.
Ability to work in a fast-paced cross-functional environment.
Ownership mindset with strong execution focus.
Ability to mentor junior engineers and drive technical initiatives.
Success Metrics
Reduction in verification turnaround time through emulation.
Improved bug discovery at subsystem and SoC levels.
Successful execution of software-driven and long-running workloads.
Verification closure with high quality and predictable schedules.
Contribution to reusable and scalable emulation infrastructure.
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